Abstract
Fragile micromachined MEMS structures are usually protected by bonding a capping wafer to the device wafer itself. As opposed to using lateral interconnects at the interface between the cap wafer and the device wafer, the use of vertical through silicon vias (TSVs) significantly simplifies the mounting of the components and it also results in the smallest footprint. This paper presents the concept chosen for fabricating a miniaturized MEMS acceleration switch with TSVs through the SOI (silicon on insulator) device wafer, as well as the experimental results of the TSV process development that was done for this particular application. Especially challenging was the development of an etching process that can etch the thick buried oxide of the SOI wafer through high aspect ratio trenches.