Abstract
The carrier lifetime control over 150 μm thick 4H-SiC epitaxial layers via thermal generation and annihilation of carbon vacancy (VC) related Z1/2 lifetime killer sites is reported. The defect developments upon typical SiC processing steps, such as high- and moderate-temperature anneals in the presence of a carbon cap, are monitored by combining electrical characterization techniques capable of VC depth-profiling, capacitance–voltage (CV) and deep-level transient spectroscopy (DLTS), with a novel all-optical approach of cross-sectional carrier lifetime profiling across 4H-SiC epilayer/substrate based on imaging time-resolved photoluminescence (TRPL) spectroscopy in orthogonal pump-probe geometry, which readily exposes in-depth efficacy of defect reduction and surface recombination effects. The lifetime control is realized by initial high-temperature treatment (1800 °C) to increase VC concentration to ≈1013 cm−3 level followed by a moderate-temperature (1500 °C) post-annealing of variable duration under C-rich thermodynamic equilibrium conditions. The post-annealing carried out for 5 h in effect eliminates VC throughout the entire ultra-thick epilayer. The reduction of VC-related Z1/2 sites is proven by a significant lifetime increase from 0.8 to 2.5 μs. The upper limit of lifetimes in terms of carrier surface leakage and the presence of other nonradiative recombination centers besides Z1/2, possibly related to residual impurities such as boron are discussed.